IBM Patents
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IBM Patents by Type
- IBM Patents Granted: IBM patents that have been granted by the United States Patent and Trademark Office (USPTO).
- IBM Patent Applications: IBM patent applications that are pending before the United States Patent and Trademark Office (USPTO).
Patent number: 9326386
Abstract: An apparatus includes a component bay having an operational height and an expanded height. The component bay is moveable between the operational height and the expanded height. A thermal element divides the component bay into one or more compartments, each compartment configured to receive a system component. The component bay at the operational height provides thermal contact between the received system component and the thermal element.
Type:
Grant
Filed:
April 22, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Bret P. Elison, Phillip V. Mann, Arden L. Moore, Arvind K. Sinha
Patent number: 9326429
Abstract: Cooling apparatuses are provided to facilitate active control of thermal and fluid dynamic performance of a coolant-cooled cold plate. The cooling apparatus includes the cold plate and a controller. The cold plate couples to one or more electronic components to be cooled, and includes an adjustable physical configuration. The controller dynamically varies the adjustable physical configuration of the cold plate based on a monitored variable associated with the cold plate or the electronic component(s) being cooled by the cold plate. By dynamically varying the physical configuration, the thermal and fluid dynamic performance of the cold plate are adjusted to, for example, optimally cool the electronic component(s), and at the same time, reduce cooling power consumption used in cooling the electronic component(s). The physical configuration can be adjusted by providing one or more adjustable plates within the cold plate, the positioning of which may be adjusted based on the monitored variable.
Type:
Grant
Filed:
September 6, 2012
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Timothy J. Chainer, Pritish R. Parida
Patent number: 9320465
Abstract: A biochip and nanochip device, or a system of biochips, providing diagnostic testing, sensing and therapeutic functionality useful in diagnosis and treatment of a variety of physiological maladies.
Type:
Grant
Filed:
June 25, 2012
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventor:
Eric V. Kline
Patent number: 9321291
Abstract: The present invention relates to a method for determining survival state of a print head. The cleaning behavior of a print head can be used for reflecting health status of the print head, so survival state of a print head can be determined according to cleaning behavior of the print head. Specifically, a method is implemented for determining survival state of a print head, comprising: obtaining cleaning behavior data and cumulative printing amount upon failure occurrence of print head(s) of reference printer(s) as well as cleaning behavior of a print head of a current printer; obtaining printing amount of the current printer; determining survival state of the print head of the current printer according to cleaning behavior data and cumulative printing amount upon failure occurrence of the print head(s) of the reference printer(s) as well as cleaning behavior data and printing amount of the current printer.
Type:
Grant
Filed:
June 24, 2015
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Xuan Chen, Chang Rui Ren, Fei Liu, Qin Hua Wang
Patent number: 9321447
Abstract: An approach is provided in which a powertrain synchronizer analyzes condition data that corresponds to impending conditions external to a vehicle. The powertrain synchronizer predicts a driver's future action in response analyzing the condition data and adjusts the vehicle's powertrain subsystem based upon the predicted driver action.
Type:
Grant
Filed:
May 16, 2014
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Tamer E. Abuelsaad, Gregory J. Boss, Brent Hodges, John E. Moore, Jr.
Patent number: 9321634
Abstract: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is removed to produce a metal beam separated from the silicon substrate by a space.
Type:
Grant
Filed:
January 29, 2015
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
William J. Gallagher, Eugene J. O'Sullivan, Naigang Wang
Patent number: 9322061
Abstract: A technique includes forming a gradient channel with width and depth gradients. A mask is disposed on top of a substrate. The mask is patterned with at least one elongated channel pattern having different elongated channel pattern widths. A channel is etched in the substrate in a single etching step, the channel having a width gradient and a corresponding depth gradient both simultaneously etched in the single etching step according to the different elongated channel pattern widths in the mask.
Type:
Grant
Filed:
March 6, 2014
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Jingwei Bai, Qinghuang Lin, Gustavo A. Stolovitzky, Chao Wang, Deqiang Wang
Patent number: 9322151
Abstract: An apparatus includes a sensor module, a transmission module, a flow reduction module, and a flow return module. The sensor module senses presence of a shower item on a shelf in a shower and senses a lack of presence of the shower item on the shelf. The transmission module wirelessly transmits an item missing signal. The item missing signal is transmitted in response to sensing a lack of presence of the shower item on the shelf. The flow reduction module reduces water flow to a shower head in the shower from a first flow level to a reduced flow level in response to wirelessly receiving the item missing signal. The flow return module returns water flow to the first flow level in response to expiration of a restore time delay or wirelessly receiving an item return signal in response to sensing a presence of the shower item on the shelf.
Type:
Grant
Filed:
October 25, 2012
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Janani Janakiraman, Dany R Madden, Meenakshi Sripal
Patent number: 9322647
Abstract: A camera at a fixed vertical height positioned above a reference plane, with an axis of a camera lens at an acute angle with respect to a perpendicular of the reference plane. One or more processors receive images of different people. The vertical measurement values of the images of different people are determined. The one or more processors determine a first statistical measure associated with a statistical distribution of the vertical measurement values. The known heights of people from a known statistical distribution of heights of people are transformed to normalized measurements, based in part on a focal length of the camera lens, the angle of the camera, and a division operator in an objective function of differences between the normalized measurements and the vertical measurement values. The fixed vertical height of the camera is determined, based at least on minimizing the objective function.
Type:
Grant
Filed:
March 28, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Ankur Datta, Rogerio S. Feris, Sharathchandra U. Pankanti, Yun Zhai
Patent number: 9322657
Abstract: A processor-implemented method, system, and computer program product guides mobility-impaired pedestrians. A processor receives mobile tracking readings from each of multiple mobility assistance devices, and identifies pedestrian routes taken by the mobility assistance devices to a desired destination. The processor identifies multiple routes, each of which has more mobile tracking readings than other pedestrian routes. The processor associates a recurring public event to times during which mobile tracking readings were taken to a first pedestrian route, and associates a lack of the recurring public event to times during which mobile tracking readings were taken to a second pedestrian route. If the recurring public event is currently in progress along the first pedestrian route, then the processor transmits directions that describe the second pedestrian route at which the public event is not occurring.
Type:
Grant
Filed:
August 26, 2015
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Robert R. Friedlander, James R. Kraemer
Patent number: 9322662
Abstract: A method of determining a path comprises obtaining a path in a road net, the road net comprising a plurality of nodes; calculating, with a processing device, an event displacement probability within coverage of the path, wherein the event displacement probability is used to describe a possibility of displacement of an event that could have occurred within the coverage of the path, to outside the coverage of the path to occur; and changing the path based on the event displacement probability.
Type:
Grant
Filed:
June 24, 2013
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Wei Shan Dong, Ning Duan, Ronald Fellows, Li Li, Wei Sun, Zhi Hu Wang, Chang Jin Zhou
Patent number: 9322799
Abstract: A device structure for detecting partial pressure of oxygen in blood includes a semiconductor substrate including a source region and a drain region. A multi-layer gate structure is formed on the semiconductor substrate. The multi-layer gate structure includes an oxide layer formed over the semiconductor substrate, a high-k layer formed over the oxide layer, a metal gate layer formed over the high-k layer, and a polysilicon layer formed over the metal gate layer. A receiving area holds a blood sample in contact with the multi-layer gate structure. The high-k layer is exposed to contact the blood sample in the receiving area.
Type:
Grant
Filed:
April 3, 2013
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Chen Shi, Steven E. Steen, Yanfeng Wang, Sufi Zafar
Patent number: 9322854
Abstract: A method of measurement using a detachable current and voltage sensor provides an isolated and convenient technique for to measuring current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing that contains the current and voltage sensors, which may be a ferrite cylinder with a hall effect sensor disposed in a gap along the circumference to measure current, or alternative a winding provided through the cylinder along its axis and a capacitive plate or wire disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.
Type:
Grant
Filed:
April 19, 2012
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Gary D. Carpenter, Wael El-Essawy, Alexandre Peixoto Ferreira, Thomas Walter Keller, Juan C. Rubio, Michael A. Schappert
Patent number: 9322855
Abstract: A detachable current and voltage sensor provides an isolated and convenient device to measure current passing through a conductor such as an AC branch circuit wire, as well as providing an indication of an electrostatic potential on the wire, which can be used to indicate the phase of the voltage on the wire, and optionally a magnitude of the voltage. The device includes a housing formed from two portions that mechanically close around the wire and that contain the current and voltage sensors. The current sensor is a ferrite cylinder formed from at least three portions that form the cylinder when the sensor is closed around the wire with a hall effect sensor disposed in a gap between two of the ferrite portions along the circumference to measure current. A capacitive plate or wire is disposed adjacent to, or within, the ferrite cylinder to provide the indication of the voltage.
Type:
Grant
Filed:
June 30, 2014
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Gary D. Carpenter, Wael El-Essawy, Alexandre Peixoto Ferreira, Thomas Walter Keller, Juan C. Rubio, Michael A. Schappert
Patent number: 9322876
Abstract: A scan chain of an integrated circuit is disclosed, including a plurality of scannable storage elements and a control test point having a scan latch and an integrated clock gate (ICG) with clock, functional enable (FE) and scan enable (SE) inputs, and a gated clock output. The ICG may respond to an SE input active state, in a serial scan mode allowing the gated clock output to change. The ICG may also be operated in a scan capture mode, responding to an SE input inactive state, in which the gated clock output is inhibited from changing in response to a low FE input level. The ICG's gated clock output may be coupled to the scan latch clock input, which may hold its data output at a fixed level in response to ICG's gated clock output being inhibited from changing during the scan capture operation.
Type:
Grant
Filed:
August 14, 2015
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Purushotam Bheemanna, Raghu G. GopalaKrishnaSetty, Pavan K. Guntipalli
Patent number: 9322987
Abstract: An optical connector includes a fiber element incorporating one or more optical fibers, the optical fiber including a plurality of cores, and an optical element including an array of optical waveguides arranged in one or more layers so as to match the geometry of the plurality of cores of the optical fiber.
Type:
Grant
Filed:
August 27, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Fuad Doany, Daniel M. Kuchta, Petar K. Pepeljugoski, Laurent Schares
Patent number: 9323004
Abstract: An optical device and a method of manufacturing an optical device. The optical device includes: a conversion means for converting propagation light propagating through an optical waveguide into parallel light and for outputting the parallel light; and a first lens means for focusing the parallel light outputted from the conversion means on a core of an optical fiber. The method includes: converting propagation light propagating through an optical waveguide into parallel light; outputting the parallel light; and focusing, using a first lens, the parallel light on a core of an optical fiber.
Type:
Grant
Filed:
June 9, 2014
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventor:
Yoichi Taira
Patent number: 9323009
Abstract: A computer program product for fabricating an optical assembly having stored computer readable program code including a first program to place a flexible portion of a substrate including a waveguide, the waveguide exposed at one end edge of the substrate upon a horizontally movable stage of a flip-chip bonder, a second program to vertically move a clamp through the stage opening to place the waveguide exposed end in a vertical position, a third program to vertically downwardly move a bond head containing an optical component upon the waveguide exposed substrate edge to position the optical component with the exposed waveguide, a fourth program to fixably mount the optical component to the substrate edge, and a fifth program to release the optical component from the bond head while moving the clamp vertically downward through the stage opening unbending the flexible portion of the substrate with the optical component mounted thereon.
Type:
Grant
Filed:
April 2, 2014
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Stefano Sergio Oggioni, Jonas R. Weiss, Bert Jan Offrein
Patent number: 9323439
Abstract: A system and method that displays published electronic documents including an electronic periodical database that stores electronic files representing a plurality of electronic documents and a plurality of corresponding published issues to each of the plurality of electronic documents, a electronic periodical display controller that displays a graphic substrate upon which the electronic documents and corresponding published issues are arranged, a user input controller that receives user input to manipulate the graphic substrate to control a zooming function and a panning function, and associates input user information with a specific one of the plurality of electronic published issues, and a user input database that saves the input user information associated with the specific electronic published issue, and displays the stored input user information within the graphic substrate associated with the specific one of the plurality of electronic published issues of the plurality of electronic documents.
Type:
Grant
Filed:
March 28, 2008
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor:
Chandrasekhar Narayanaswami
Patent number: 9323440
Abstract: Nesting information indicative of a nested arrangement of a set of scrollable areas within an environment is obtained. Focus information indicative of which of the set of scrollable areas is in focus within the environment is obtained. For at least one of the set of scrollable areas, at least one display property of the respective scrollable area is altered based upon the nesting information and the focus information.
Type:
Grant
Filed:
December 4, 2012
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Pawel J. Borkowski, Michal Klak, Maksymilian J. Kowalik, Bartlomiej T. Malecki
Patent number: 9323300
Abstract: An indication of a first performance state is received, the first performance state being associated with a first voltage. The first performance state applies to at least one computing system component and the indication is received by a computing system component distinct from the requesting computing system component. An indication of a second performance state is received. The second performance state is associated with a second voltage that is different from the first voltage. It is determined whether the second performance state is within a range defined by a minimum and maximum performance state. Responsive to a determination that the second performance state is within the minimum and maximum performance state, the voltage of the at least one computing system component is set equal to the voltage associated with the second performance state.
Type:
Grant
Filed:
November 27, 2012
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Bishop Brock, Tilman Gloekler, Timothy G. Hallett, Charles R. Lefurgy, Karthick Rajamani, Guillermo J. Silva, Gregory S. Still, Malcolm S. Allen-Ware
Patent number: 9323544
Abstract: Dynamic reconfiguration of queue pairs in a data processing system is provided. A device driver determines whether a dynamic CPU reconfiguration has added one or more CPUs to the data processing system, wherein the data processing system comprises a number of CPUs and a number of queue pairs. Responsive to the dynamic CPU configuration adding one or more CPUs, the device driver allocates a portion of a memory corresponding to a queue pair, wherein each queue pair comprises a receive queue and a transmit queue, programs a receive side scaling mechanism in a network adapter to allow for dynamic insertion of a processing engine associated with the queue pair, and enables transmit tuple hashing to the queue pair.
Type:
Grant
Filed:
October 9, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Harikrishna K. Manchineni, Sanket Rathi, Prashant Sreedharan
Patent number: 9323302
Abstract: According to one embodiment, a system is provided that includes at least one power gated component and two or more power switch transistors configured to provide one or more conductive paths between a common power supply rail, the at least one power gated component, and a ground. The two or more power switch transistors each include a source terminal, a drain terminal, and a gate terminal configured to control current flow between the source and drain terminals. The system also includes a rotating voltage control coupled to the gate terminals and configured to apply a sequence of control signals rotating between an on-state and an off-state to each of the gate terminals while the at least one power gated component is turned on. A switch activation ratio level is programmable to set a number of power switch transistors in the on-state relative to a total number of power switch transistors.
Type:
Grant
Filed:
December 19, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Pradip Bose, Alper Buyuktosunoglu, Hans M. Jacobson, Victor Zyuban
Patent number: 9323309
Abstract: A computing system is provided and includes recording media relative to which input/output (I/O) operations are executable, and a processor, disposed in signal communication with the recording media, which is configured to execute the I/O operations and to evaluate power requirements associated with executions of the I/O operations relative to each individual recording medium. The processor includes a computer-readable medium having a set of instructions stored thereon, which, when executed, cause the processor to schedule the executions of the I/O operations relative to each individual recording medium or to refuse the executions of the I/O operations in accordance with the evaluated power requirements.
Type:
Grant
Filed:
August 11, 2014
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Robert J. Brenneman, Eli M. Dow, William J. Huie, Sarah J. Sheppard
Patent number: 9323317
Abstract: A method of saving power in a computing system having a plurality of dial in-line memory modules (DIMMs) and employing a suspend-to-RAM sleep mode includes, when entering suspend-to-RAM sleep mode, consolidating selected information into a subset of DIMMs, and turning off power to all other DIMMs. A DIMM power rail may be coupled to each of the DIMMs, the DIMM power rail being configured to selectively have power being supplied to respective DIMMs turned off in response to enable/disable logic signals.
Type:
Grant
Filed:
December 12, 2012
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Canturk Isci, Jeffrey O. Kephart, Suzanne K. McIntosh, Scott A. Piper, Robert R. Wolford
Patent number: 9323331
Abstract: Systems and methods are provided for evaluating the quality of automatically composed digital content based on intentional user feedback obtained through a haptic interface. For example, a method includes accessing intentional user feedback collected by a haptic interface executing on a computing device, wherein the intentional user feedback provides an indication as to a user's reaction toward digital content that the user interacts with on the computing device. The digital content includes content that is automatically generated using content generation rules. The method further includes evaluating a quality of the digital content based on the intentional user feedback, and generating an evaluation report that includes information providing an evaluation of the quality of the digital content.
Type:
Grant
Filed:
May 21, 2014
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Carlos H. Cardonha, Fernando L. Koch
Patent number: 9323649
Abstract: Detecting error states when interacting with web applications is performed by accessing a first web page of a web application, determining that the first web page includes an input validation operation, configuring an input to cause the input validation operation to effect an error state, providing the input to the first web page, thereby effecting the error state, identifying a feature that is absent from the first web page before the input is provided to the first web page and present in the first web page after the input is provided to the first web page, and detecting that a second web page of the web application is in an error state if the feature is present in the second web page.
Type:
Grant
Filed:
September 30, 2013
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Evgeny Beskrovny, Omer Tripp
Patent number: 9323656
Abstract: Embodiments herein are directed to a method for installing a program across multiple memories. The method includes calculating a memory space requirement of the program. It may be determined that a first available memory space in a first memory of the first computer system is smaller than the memory space requirement. The first memory is a default memory for installing the program. Upon determining that the first available memory space in the first memory is smaller than the memory space requirement, the method may perform the step of identifying a second memory in communication with the first computer system that has a second available memory space. The first and second available memory spaces, when combined, are sufficient for the memory space requirement to install files of the program. The files of the program may be installed in the first and second memories.
Type:
Grant
Filed:
June 25, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Rohan A. Ambasta, Bharath Ganesh, Aniket A. Kulkarni, Umesh S. Wani
Patent number: 9323668
Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.
Type:
Grant
Filed:
June 10, 2011
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Peter D. Driever, Charles W. Gainey, Jr., Steven G. Glassen, Thomas B. Mathias, Kenneth J. Oakes, Peter G. Sutton, Peter K. Szwed, Elpida Tzortzatos, Harry M. Yudenfriend
Patent number: 9323673
Abstract: A hierarchical cache structure comprises at least one higher level cache comprising a unified cache array for data and instructions and at least two lower level caches, each split in an instruction cache and a data cache. An instruction cache and a data cache of a split second level cache are connected to a third level cache; and an instruction cache of a split first level cache is connected to the instruction cache of the split second level cache, and a data cache of the split first level cache is connected to the instruction cache and the data cache of the split second level cache.
Type:
Grant
Filed:
November 4, 2013
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Christian Habermann, Christian Jacobi, Martin Recktenwald, Hans-Werner Tast
Patent number: 9323675
Abstract: Filtering snoop traffic in a multiprocessor computing system, each processor in the multiprocessor computing system coupled to a high level cache and a low level cache, the including: receiving a snoop message that identifies an address in shared memory targeted by a write operation; identifying a set in the high level cache that maps to the address in shared memory; determining whether the high level cache includes an entry associated with the address in shared memory; responsive to determining that the high level cache does not include an entry corresponding to the address in shared memory: determining whether the set in the high level cache has been bypassed by an entry in the low level cache; and responsive to determining that the set in the high level cache has not been bypassed by an entry in the low level cache, discarding the snoop message.
Type:
Grant
Filed:
February 20, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Jason A. Cox, M V V Anil Krishna, Eric F. Robinson, Brian M. Rogers
Patent number: 9323676
Abstract: Embodiments relate to a non-data inclusive coherent (NIC) directory for a symmetric multiprocessor (SMP) of a computer. An aspect includes determining a first eviction entry of a highest-level cache in a multilevel caching structure of the first processor node of the SMP. Another aspect includes determining that the NIC directory is not full. Another aspect includes determining that the first eviction entry of the highest-level cache is owned by a lower-level cache in the multilevel caching structure. Another aspect includes, based on the NIC directory not being full and based on the first eviction entry of the highest-level cache being owned by the lower-level cache, installing an address of the first eviction entry of the highest-level cache in a first new entry in the NIC directory. Another aspect includes invalidating the first eviction entry in the highest-level cache.
Type:
Grant
Filed:
March 5, 2013
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Timothy C. Bronson, Garrett M. Drapala, Rebecca M. Gott, Pak-Kin Mak, Vijayalakshmi Srinivasan, Craig R. Walters
Patent number: 9323677
Abstract: A data processing system includes a plurality of virtual machines each having associated memory pages; a shared memory page cache that is accessible by each of the plurality of virtual machines; and a global hash map that is accessible by each of the plurality of virtual machines. The data processing system is configured such that, for a particular memory page stored in the shared memory page cache that is associated with two or more of the plurality of virtual machines, there is a single key stored in the global hash map that identifies at least a storage location in the shared memory page cache of the particular memory page. The system can be embodied at least partially in a cloud computing system.
Type:
Grant
Filed:
August 15, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Parijat Dube, Xavier R. Guerin, Seetharami R. Seelam
Patent number: 9323687
Abstract: For data processing in a computing storage environment by a processor device, the computing storage environment incorporating at least high-speed and lower-speed caches, and tiered levels of storage, groups of data segments are migrated between the tiered levels of storage such that uniformly hot ones of the groups of data segments are migrated to utilize a Solid State Drive (SSD) portion of the tiered levels of storage, while sparsely hot ones of the groups of data segments are migrated to utilize the lower-speed cache.
Type:
Grant
Filed:
November 7, 2013
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Michael T. Benhase, Lokesh M. Gupta, Cheng-Chung Song
Patent number: 9323692
Abstract: In response to a current context, with a particular process currently in control of a processor requesting access to a shared address space, a translation lookaside buffer (TLB) controller sets a process identifier field in a virtual address to be looked up in a TLB to a clamped value different from an identifier for the process, wherein the virtual address comprises at least the process identifier field and an effective address field set to an address in the requested shared address space. In response to the TLB controller comparing the virtual address for the current context to a particular entry of at least one entry within the TLB comprising the at least one entry stored for a previous translation of a previous virtual address, the TLB controller only indicates a match between the process identifier field and a translation process identifier field within the particular entry of the TLB if the translation process identifier field is also set to the clamped value.
Type:
Grant
Filed:
April 17, 2014
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Anthony J. Bybell, Bradly G. Frey, Michael K. Gschwind, Benjamin Herrenschmidt, Paul MacKerras
Patent number: 9323694
Abstract: Storage tracks from at least one server are destaged from the write cache rank when it is determined that the at least one server is idle with respect to a first set of ranks, and storage tracks are refrained from being destaged from each rank when it is determined that the at least one server is not idle with respect to a second set of ranks such that storage tracks in the first set of ranks may be destaged while storage tracks in the second set of ranks are not being destaged.
Type:
Grant
Filed:
June 1, 2015
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Brent C. Beardsley, Michael T. Benhase, Binny S. Gill, Lokesh M. Gupta, Sonny E. Williams
Patent number: 9323702
Abstract: In the verification of an integrated circuit design having arbitration logic which controls access from a plurality of requesters to a shared resource, an arbitration stall simulation mechanism selects one or more of the requesters for an extended stall procedure, and when a global counter expires, applies stalls having controlled durations to the selected requesters. The controlled durations can be randomly generated time periods within a preset range. The number of requesters subjected to the extended stall procedure can be randomly selected based on a predetermined percentage of requesters to stall. Local (requester-specific) code can perform the stalls for respective requesters using a stall duration inputs. The requester-specific codes can carry out the stalls using application program interface calls to override respective arbiter inputs from the requesters.
Type:
Grant
Filed:
November 27, 2012
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
David W. Cummings, Jonathan R. Jackson, Guy L. Guthrie
Patent number: 9323703
Abstract: Techniques are disclosed to provide arbitration between input ports and output ports of a switch. For each of at least one input port of a group of input ports, a respective request is received specifying for the respective input port to be allocated a clock cycle in which to send data to a group of output ports. A grant of the request of a primary input port is issued at each clock cycle, the primary input port including a first input port of the at least one input port. Upon a determination, subsequent to a first clock cycle count elapsing, that an input arbiter has not yet accepted any grant of the request of the primary input port, a grant is issued at each clock cycle, including alternating between issuing a grant of the request of the primary input port and of an alternate input port, respectively.
Type:
Grant
Filed:
October 17, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Vibhor K. Srivastava, Brian T. Vanderpool
Patent number: 9323720
Abstract: A user initiated unification command can be received from a user interface. The unification command can be associated with a selected portion of a fragmented document. The fragmented document can include more than one discrete documents interconnected by at least one reference. Each reference can be a linkage to content of a document other than the one containing the reference. The selected portion can be associated with one of the discrete documents referred to as a root document. Responsive to the unification command, content represented by the reference can be acquired from the associated discrete documents without presenting the discrete document within a user interface window. The acquired content can be added to the root document.
Type:
Grant
Filed:
March 2, 2009
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Scott J. Clee, Robert A. Harris, Daniel E. Would, Shanna Xu
Patent number: 9323728
Abstract: A method, system and computer program product for coordinating the management of portal pages and its associated web content. A node is created in the portal database representing a draft of a portal page, where the node refers to a data structure that holds structured information pertaining to the portal content (e.g., portlet instances, layout, design). A shadow node associated with the portal page is created in the web content management system, where the web content of the portal page is associated with the shadow node. The shadow node refers to a data structure that stores information used to identify the portal page stored in the portal database. The portal page, after completing various tasks in the workflow process, is rendered by linking the web content of the portal page associated with its shadow node with the portal content of the portal page stored in the portal database.
Type:
Grant
Filed:
March 16, 2012
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Dieter Buehler, Hendrik Haddorp, Mark C. Hampton, Stefan A. Hepper, Carsten Leue, Eric Martinez de Morentin
Patent number: 9323729
Abstract: A method, system and computer program product for coordinating the management of portal pages and its associated web content. A node is created in the portal database representing a draft of a portal page, where the node refers to a data structure that holds structured information pertaining to the portal content (e.g., portlet instances, layout, design). A shadow node associated with the portal page is created in the web content management system, where the web content of the portal page is associated with the shadow node. The shadow node refers to a data structure that stores information used to identify the portal page stored in the portal database. The portal page, after completing various tasks in the workflow process, is rendered by linking the web content of the portal page associated with its shadow node with the portal content of the portal page stored in the portal database.
Type:
Grant
Filed:
April 30, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Dieter Buehler, Hendrik Haddorp, Mark C. Hampton, Stefan A. Hepper, Carsten Leue, Eric Martinez de Morentin
Patent number: 9323734
Abstract: A method and system are provided for identifying type-ahead candidates. A method includes determining a context of past non-threaded emails of a user. The method further includes generating a context index associating the past non-threaded emails of the determined context with repeatable values within the past non-threaded emails. The method further includes receiving characters in a current email and determining a context of the current email. The method further includes determining matches between the current email and the past non-threaded in the context index. The method further includes identifying the corresponding repeatable values and matching the identified corresponding repeatable values with the received characters. The method further includes presenting the candidate words to the user for inclusion in the current email.
Type:
Grant
Filed:
August 24, 2012
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Gregory J. Boss, Rick A. Hamilton, II, Kevin C. McConnell, James W. Seaman
Patent number: 9323506
Abstract: A communication stack for software-hardware co-execution on heterogeneous computing systems with processors and reconfigurable logic, in one aspect, may comprise a crossbar operable to connect hardware user code and functioning as a platform independent communication layer. A physical interface interfaces to the reconfigurable logic. A physical interface bridge is connected to the cross and the physical interface. The physical interface bridge connects the crossbar and the physical interface via a platform specific translation layer specific to the reconfigurable logic. The crossbar, the physical interface, and the physical interface bridge may be instantiated in response to the hardware user code being generated, the crossbar instantiated with associated parameters comprising one or more routes and associated data widths. The hardware user code is assigned a unique virtual route in the crossbar.
Type:
Grant
Filed:
August 5, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Perry S. Cheng, Rodric Rabbah, Sunil K. Shukla
Patent number: 9323551
Abstract: A technique of modifying a code sequence for a processor includes identifying a set of one or more target instructions in the code sequence. A replacement instruction is selected that includes a set of replacement instruction parts. A length of each of the replacement instruction parts corresponds to a minimum instruction length for an instruction set of the processor. The replacement instruction parts include a first instruction type and one or more second instruction types that are each configured as exception instructions if processed in isolation from the first instruction type. The replacement instruction is then substituted for the set of one or more target instructions in the code sequence for processing by the processor.
Type:
Grant
Filed:
January 6, 2012
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventor:
Neil A. Campbell
Patent number: 9323553
Abstract: Performing a checkpoint includes determining a checkpoint boundary of the checkpoint for a virtual machine, wherein the virtual machine has a first virtual processor, determining a scheduled hypervisor interrupt for the first virtual processor, and adjusting, by operation of one or more computer processors, the scheduled hypervisor interrupt to before or substantially at the checkpoint boundary.
Type:
Grant
Filed:
September 13, 2013
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventor:
David A. Larson
Patent number: 9323559
Abstract: Performing a checkpoint includes determining a checkpoint boundary of the checkpoint for a virtual machine, wherein the virtual machine has a first virtual processor, determining a scheduled hypervisor interrupt for the first virtual processor, and adjusting, by operation of one or more computer processors, the scheduled hypervisor interrupt to before or substantially at the checkpoint boundary.
Type:
Grant
Filed:
September 30, 2015
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventor:
David A. Larson
Patent number: 9323560
Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.
Type:
Grant
Filed:
July 20, 2015
Date of Patent:
April 26, 2016
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventors:
Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittman, III, Richard P. Tarcza, Leslie W. Wyman
Patent number: 9323561
Abstract: In general, embodiments of present invention provide an approach for calibrating a cloud computing environment. Specifically, embodiments of the present invention provide an empirical approach for obtaining end-to-end performance characteristics for workloads in the cloud computing environment (hereinafter the “environment”). In a typical embodiment, different combinations of cloud server(s) and cloud storage unit(s) are determined. Then, a virtual machine is deployed to one or more of the servers within the cloud computing environment. The virtual machine is used to generate a desired workload on a set of servers within the environment. Thereafter, performance measurements for each of the different combinations under the desired workload will be taken. Among other things, the performance measurements indicate a connection quality between the set of servers and the set of storage units, and are used in calibrating the cloud computing environment to determine future workload placement.
Type:
Grant
Filed:
August 13, 2010
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Richard Ayala, Kavita Chavda, Sandeep Gopisetty, Seshashayee S. Murthy, Aameek Singh
Patent number: 9323567
Abstract: A host-side overcommit value is set upon a physical node that implements virtual machines (VM Node). The overcommit value is determined by receiving a selected enablement template that includes a selected computing capacity and a selected overcommit value. A user-side normalization factor is determined that normalizes the selected computing capacity against a reference data handling system. A comparable computing capacity of the VM Node is determined. A host-side normalization factor is determined that normalizes the comparable computing capacity against the reference data handling system. The host-side overcommit value is determined from the selected overcommit value, the user-side normalization factor, and the host-side normalization factor. The host-side overcommit value may indicate the degree the comparable computing capacity is overcommitted to virtual machines deployed upon heterogeneous VM Nodes as normalized against the reference system.
Type:
Grant
Filed:
September 25, 2014
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Susan F. Crowell, Jason A. Nikolai, Andrew T. Thorstensen
Patent number: 9323568
Abstract: Accessing at least one memory location by one of a plurality of transactions in a multi-processor transactional execution environment is provided. Included is assigning, by a computer system, a conflict priority to a transaction; based on encountering a conflict with another process for a memory location, comparing, by the computer system, the assigned conflict priority of the transaction with another priority of the another process; and based on the conflict priority of the transaction being the higher priority continuing the transaction; and based on the conflict priority of the transaction being the lower priority, aborting the transaction.
Type:
Grant
Filed:
January 24, 2014
Date of Patent:
April 26, 2016
Assignee:
International Business Machines Corporation
Inventors:
Fadi Y. Busaba, Michael Karl Gschwind, Eric M. Schwarz